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Zero-extension
New post in Zero-extension
andi vs. addi instruction in MIPS with negative immediate constant
June 4th, 2022
assembly
immediate-operand
zero-extension
sign-extension
mips
Clarifications on signed/unsigned load and store instructions (MIPS)
August 15th, 2020
zero-extension
assembly
mips
sign-extension
What does the MOVZBL instruction do in IA-32 AT&T syntax?
July 23rd, 2020
x86
assembly
zero-extension
att
x86_64 registers rax/eax/ax/al overwriting full register contents
July 8th, 2022
cpu-registers
assembly
x86-64
zero-extension
Why do x86-64 instructions on 32-bit registers zero the upper part of the full 64-bit register?
April 27th, 2021
zero-extension
assembly
x86-64
cpu-registers
x86