How are base registers, limit registers and relocation registers used?

Question

My understanding in address translation process in MMU(memory management unit)

-> logical address : generated by cpu.programmer concern with this address.

-> virtual address : reside in the hard disk , as a pages.

-> physical address : reside in the RAM. It is the actual address.

1: cpu generate the logical address and send it to the MMU.

2: MMU translate the logical address into the virtual address then translate it to the physical address and send the physical address to RAM.

3: when ever the RAM is full , the page which is not used rapidly is returned to the hard disk , to allocate memory to the other pages(processes).

my questions are : 1) where the value of Relocation register is added? 2) who decide the value of Relocation Register? 3) what to do with the Base register and Limit register , how to use it? 4) where the logical address goes off?

If any body can answer it , It would be grateful to me. It is requested that , let me know it any misunderstanding in this topic. -thanks

Solution 1

I can tell you how this works on x86.

All programs in non-64-bit modes operate with addresses combined of two items: segment selector (for brevity "selector" is often omitted in text and that may be confusing) and offset. This selector:offset pair is called the logical address.

The selector portion isn't always explicitly specified or manipulated with in code since the CPU has "default" associations of segment registers containing selectors with specific instructions or specific instruction encodings. It's also uncommon to manipulate selectors in 32-bit mode, but is very often necessary in 16-bit code.

The virtual address is formed from the logical address either "directly" (in real or 8086 virtual mode) or "indirectly" (in protected mode).

"Direct" virtual address = selector * 16 + offset.

"Indirect" virtual address = SegmentDescriptorTable[selector].Base + offset.

SegmentDescriptorTable is either the Global Descriptor Table (AKA GDT) or the Local Descriptor Table (AKA LDT). It's set up by the OS and describes the location and size of various segments of memory. selector is used to select a segment in the table. The Base entry of the table tells the segment's beginning (virtual address). The Limit entry tells the segment size (generally; the details are a little more complex).

When a program tries to access memory with an offset resulting access beyond the end of the segment (the CPU compares offset and Limit), the CPU generates an exception and the OS handles it, by usually terminating the program.

Btw, in real/v86 mode, even though the virtual address is formed directly from selector:offset, there's still a 16-bit Limit imposed on offsets, which is why you need to use a different selector to access more than 64KB of memory.

The Base entry in a segment descriptor can be used to either isolate the segment from the rest of the memory (Limit helps here) or to place or move the entire segment to an arbitrary virtual address without having to modify anything (or much) in the program it belongs to (if we're moving a segment, the data has to be moved in the memory, obviously). Basically, it can be used for relocation purposes. In real/v86 mode for relocation purposes the selector is changed.

The virtual address can be further translated to the physical address if the CPU is running in protected mode and has set up page tables. If there're no page tables, the physical address is the same as the virtual address. The translation is done in blocks of physical memory and address ranges that are called pages (often 4KB).

There's no dedicated relocation register on x86 CPUs. Relocation can be achieved by adjusting:

1. segment selectors in CPU registers or program's code
2. segment base addresses in GDT/LDT
3. offsets in program's code
4. physical addresses in page tables

As for virtual address : reside in the hard disk , as a pages, I'm not sure what exactly you want to say with this, but just because there's virtual to physical address translation, it doesn't mean there's also virtual on-disk memory. There are other uses for the translation besides virtual on-disk memory. And the addresses reside in the CPU and wherever your (and OS's) code writes them to, not necessarily on the disk.

Solution 2

Your description has a number of mistakes, much of which may be the result of imprecise documentation and common usage.

First of all, there really is no such a thing as a virtual address. There are physical and logical addresses. Sadly, the term virtual address is frequently (even in hardware documentation) used when logical address is what is meant..

The CPU instruction stream always operates on logical addresses (values may refer to physical addresses).

When the CPU needs to access a logical address, the MMU attempts to translate it to a physical addresses. It does that by looking up the address in a page table.

Several things can happen at that point:

1. There may not be a page table entry for the address => Access violation.
2. The page table entry is marked invalid => Access violation.
3. The page table entry indicates that no physical memory is mapped to it => Page fault. (I omit mode access checks). It is this last step that last step where virtual memory comes into play. At that point the page fault handler of the operating system needs to find where the corresponding page has been stored to disk, load it, update the page table, and restart the instruction.

The operating system manages the available physical memory by paging writeable memory (that has changed) to disk (read only data does not have to be written back) when there is high demand for physical memory.

I have never heard of a "relocation register" before. But doing a GOOGLE search I can see that some academic material uses it as a confusing pedagogical concept (i.e., with no relation to reality).

Some systems define the page table using base and limit registers. The base registers indicate where the page table starts in memory (this can be either a physical or logical addresses) and the limit register indicates the side of the table.

The registers are usually not loaded directly. Their values are usually written to the hardware Process Context Block (PCB). When the process context is loaded, the page table base and limit are loaded automatically.

On some systems there are multiple page tables. If there are system and user page tables, the user page tables can refer to logical addresses in the system space and the system page tables refer to physical addresses.