How many PCI express lanes does a core i7 920?

Question

I have been looking all over trying to find official docs on how many PCI-e lanes an intel core i7 920 has. I found documentation about the x58 chipset but I was told that PCI express lanes are usually limited by the CPU? Can any one explain this or share some official docs?

I did find this post which says that it has 36 but why cant I find that in any of intel's specs.

For what sort of workload can a Core i7-920 be faster than a i7-860?

Solution 1

In the first generation of INTEL Core i3/i5/i7 technology the CPU didn't have on-chip PCIe controller, so the question is ill-formulated. Actually, the PCIe controller is provided from the I/O Hub (chipset X58), which is connected to the CPU via "Quick Path Interconnect" interface, similar to the older FSB -Front-Side Bus. The PCIe controller in the X58 has 4x8 PCIe interfaces, plus 1x4, for a total of 5 slots which are configurable.

Solution 2

The compatible chipset for that CPU, as per ark.intel.com is this: http://ark.intel.com/products/36785/Intel-X58-Express-IO-Hub

It has information on PCIE revision, configuration, and max lanes.

Comments

[Admin]

These CPUs did not have a built-in PCIe controller.

[Admin]

ark.intel.com/products/36785/Intel-X58-Express-IO-Hub @DanielB They actually do on the IO hub, and the chipset can theoretically add more...

[Admin]

@AthomSfere I believe your miss interrupting the specifications. Intel does two things with PCIE first it has a lane to the CPU then certain chipsets have a second lane which the motherboards handled. I have a answer floating around here with images of the chart

[Admin]

The i7-920xm lists 16 max, but there is no mention of "max # of PCI lanes" in any of the i7-900 (non-suffix) series docs on Intel. Is this spec tied to socket design?

[Admin]

` I was told that PCI express lanes are usually limited by the CPU`. Nope. They are not. Modern CPU's can supply PCI-e lanes, but no CPU limits the number of PCI-e lanes in a system where they are provided by several potential sources.

[Admin]

@Yorik - Its specified by the chipset documentation not the socket. This has nothing to do which socket it used in a case like this.

[Admin]

Not sure why my question was down voted? I was told by someone at micro center that PCI express lanes are tied to the cpu and not the controller (which multiple people have explained it was wrong). Did I do something wrong in asking this question?

[Admin]

@ramhound: I always thought and would normally expect the chipset to define this, but I am curious why the intel documentation for some CPUs have a "max lanes" specification. Is there some circumstance where the CPU choice will affect the usable lanes? (max lanes spec under "expansion" section ark.intel.com/products/43126/… )

[Admin]

@Yorik - Because some Intel CPUs have a PCI-E lane, the other lanes are either handled by the chipset or are external to the chipset and handled by motherboard. I have a very good answer which contains diagrams for what I describe. The chipset determines what the maxium amount of lanes that are supported.

[startoftext]

Thanks Ali. I thought it might be something like that but a person at a computer store kept telling me that it was the CPU. Makes sense he was correct about the more recent CPUs but he was un aware of the older ones.

[Ale..chenski]

Apparently the computer store clerk is confused with memory channels. The i7-9x0 processors do have a direct (on-chip) memory controller supporting 3 (three) DDR3 memory channels, that' why the CPU pin count (socket) is 1366.

[Ramhound]

Good research makes a good answer; good answer

[Ale..chenski]

It is not really a research, I just happen to have a X58 LGA1366 motherboard with i7-920 as my main workstation, which I don't have much plans to change. Maybe to i7-4790 sometime later. But thanks anyway!

[plugwash]

Nitpick: the core i7 9xx series did not have an on-chip PCIe controller, the core i7 8xx (introduced slightly later but still considered "first generation") and all i3 and i5 chips did have on-chip PCIe.