How to arrange a Makefile to compile a kernel module with multiple .c files?
Solution 1
In my case the project consists of 6 files:
-
monter_main.c
,monter_main.h
-
monter_cdev.c
,monter_cdev.h
-
monter_pci.c
,monter_pci.h
monter_main.c
is the main file of my module.
Remember that you shouldn't have a file with the same name as the module you're trying to build (e.g. monter.c
and monter.ko
) unless you've got all code in that one file.
Here are my Makefiles:
-
Makefile
KDIR ?= /lib/modules/`uname -r`/build default: $(MAKE) -C $(KDIR) M=$$PWD install: $(MAKE) -C $(KDIR) M=$$PWD modules_install clean: $(MAKE) -C $(KDIR) M=$$PWD clean
-
Kbuild
obj-m := monter.o monter-objs := monter_main.o monter_cdev.o monter_pci.o
Solution 2
I would assume that just listing more object files in the second line would do the trick.
Solution 3
The dependencies for $(TARGET).o can be multiple object files, one for each source file in your driver. Many other drivers use the += operator after the initial declaration of OBJS. For example,
OBJS = nlb-driver.o
OBJS += file1.o
OBJS += file2.o
...
The target rule would then expand to be
$(TARGET).o: nlb-driver.o file1.o file2.o
$(LD) $(LD_RFLAG) -r -o $@ $(OBJS)
This is nice if there are more source files than comfortably fit on a line. But if there are only a small number of files, you can also define all the objects on a single line
OBJS = nlb-driver.o file1.o file2.o
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Daniel Silveira
Updated on April 17, 2022Comments
-
Daniel Silveira about 2 years
How to arrange a Makefile to compile a kernel module with multiple .c files?
Here is my current Makefile. It was auto generated by KDevelop
TARGET = nlb-driver OBJS = nlb-driver.o MDIR = drivers/misc EXTRA_CFLAGS = -DEXPORT_SYMTAB CURRENT = $(shell uname -r) KDIR = /lib/modules/$(CURRENT)/build PWD = $(shell pwd) DEST = /lib/modules/$(CURRENT)/kernel/$(MDIR) obj-m += $(TARGET).o default: make -C $(KDIR) M=$(PWD) modules $(TARGET).o: $(OBJS) $(LD) $(LD_RFLAG) -r -o $@ $(OBJS) ifneq (,$(findstring 2.4.,$(CURRENT))) install: su -c "cp -v $(TARGET).o $(DEST) && /sbin/depmod -a" else install: su -c "cp -v $(TARGET).ko $(DEST) && /sbin/depmod -a" endif clean: -rm -f *.o *.ko .*.cmd .*.flags *.mod.c make -C $(KDIR) M=$(PWD) clean -include $(KDIR)/Rules.make
-
Ciro Santilli OurBigBook.com almost 7 yearsWhy have two separate files
Makefile
andKbuild
? -
Mateusz Piotrowski almost 7 years@CiroSantilli刘晓波死六四事件法轮功 It is possible to do it in one file, but I was happy with this solution - I only had go modify Kbuild during development.
-
LRDPRDX about 4 yearsJust a suggestion: you could use
monter-objs := $(patsubst %.c, %.o, $(shell echo *.c))
so it creates a.o
file corresponding to each.c
one.