How to check if a file exists in a makefile

Question

I have a makefile template to compile a single DLL (for a plugin system). The makefile of the user looks like this:

EXTRA_SRCS=file1 file2
include makefile.in

In the makefile.in I have:

plugin.dll: plugin.os $(patsubst %,%.os,$(EXTRA_SRCS))

Where plugin.os is the main C++ file to be compiled. Btw, the files ending is .os are the object files compiled for shared library (i.e. using the -fpic option with gcc)

Now, the problem is that the extra sources will probably (but not necessarily) be header files. Ideally I would like to add them as dependencies for the target plugin.os and the file.cpp, but only if they exist.

The method should work for both windows and linux, or at least be adaptable to each. However, I only use the GNU version of make.

Solution 1

Use the "wildcard" function:

$(wildcard *.h)

EDIT: in order to match a specific list, do

$(wildcard $(HEADER_FILES))

There is no need to use $(filter ...), the wildcard function automatically filters files which don't exist.

Solution 2

You didn't specify what compiler(s) you are using, but if you have access to gcc/g++ you can use the -MM option.

What I do is create a file with the extension of .d for every .c or .cpp file, and then "include" the .d files. I use something like this in my Makefile:

%.d: %.c
        gcc $(INCS) $(CFLAGS) -MM $< -MF [email protected]
%.d: %.cpp
        g++ $(INCS) $(CXXFLAGS) -MM $< -MF [email protected]

I then create the dependencies like this:

C_DEPS=$(C_SRCS:.c=.d)
CPP_DEPS=$(CPP_SRCS:.cpp=.d)
DEPS=$(C_DEPS) $(CPP_DEPS)

and this at the bottom of the Makefile:

include $(DEPS)

Is this the kind of behavior you're going for? The beauty of this method is that even if you're using a non-GNU compiler for actual compiling, the GNU compilers do a good job of calculating the dependencies.

Solution 3

Does the simple

$(filter $(wildcard *.h),$(HEADER_FILES))

do what you want?

Comments

[PierreBdR]

mmhh .. I didn't know about this filter command ! what do it do ?

[ephemient]

Read Make's documentation (info pages, not manpage): $(filter PATTERNS,TEXT) is the words in TEXT which match at least one of PATTERNS. (PATTERN being make filepatterns, not regexes, so a plain filename must match exactly.)

[JesperE]

That's ok, you don't need to use wildcards. Use $(wildcard $(HEADER_FILES))