Are SystemVerilog arrays passed by value or reference?
24,549
By default, SystemVerilog passes arrays by value, copying the entire array.
It is recommended to pass arrays by reference whenever possible for performance reasons.
- If you want your function to modify the array, use
ref
. - If you want your function to read the array, use
const ref
.
Example:
function void pass_by_value(int array[5], int queue[$], int assoc[int]);
// Default.
// A copy of the arrays is made in this function
endfunction
function void pass_by_ref(ref int array[5], ref int queue[$],
ref int assoc[int]);
// Original arrays are being referenced
endfunction
function void pass_by_const_ref(const ref int array[5],
const ref int queue[$],
const ref int assoc[int]);
// Original arrays are being referenced
// And they can be read but cannot be modified in this function
endfunction
Example on EDA Playground: http://www.edaplayground.com/x/2m9
Author by
Victor Lyuboslavsky
Enthusiast programmer, entrepreneur, author. My Book Telemedicine and Telehealth 2.0 Favorite Resources EDA Playground - run HDL simulations online (supports SystemVerilog, Verilog, VHDL, and other HDLs) SystemVerilog LRM IEEE Std 1800-2012 (includes legacy Verilog) UVM 1.2 Class Reference UVM 1.1d Class Reference
Updated on July 05, 2022Comments
-
Victor Lyuboslavsky almost 2 years
By default, does SystemVerilog pass arrays by value or reference?
For example:
int array[5] = '{0,1,2,3,4}; some_function(array); // <-- value or reference?