How linux know which irq number should be used?

Question

I am not a driver programmer, I don't have a clear picture of how linux assign irq number for pcie devices.

From an NIC driver example, it seems Linux already know which irq number should be used before the function of 'probe' or 'open' was executed.

ex: https://github.com/torvalds/linux/blob/4608f064532c28c0ea3c03fe26a3a5909852811a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c#L6608

err = ixgbe_request_irq(adapter);

ixgbe can get irq number by using the data of the 'adapter' variable, it means the irq value already inside adapter structure, it is not a generated number, it is an already existed value.

if it is read from pci/pcie configuration space, wasn't it very easy to conflict with other devices?

if it is generated/arrange by kernel, how the irq number already inside the 'adapter' variable? ( or it is assigned by BIOS ? )

For interrupt for MSI, it seems generated by kernel ??

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In my understanding, the irq number should be read from Interrupt Line Register (offset 3Ch) in PCIe configuration space, I guess that's why kerenl already know which irq number should be used, and Interrupt Line Register should be updated by BIOS ( my guess ) during boot, but there still a virtual IRQ ( when lspci without -b ), and seems MSI has another irq (?), are they common resource like memory to be arranged ?

Solution

for legacy interrupt, the irq value was read from the configuration space, however, the irq value was mostly assigned by BIOS.

more info for this part: http://tldp.org/HOWTO/Plug-and-Play-HOWTO-7.html

For MSI/MSI-X interrupt, it is done by allocation.

ex: pci_alloc_irq_vectors() https://www.kernel.org/doc/Documentation/PCI/MSI-HOWTO.txt

Comments

[Mark]

"By the time Linux boots, the computer’s firmware has already assigned a unique interrupt number to the device, and the driver just needs to use it." -- ldd3, page.317

[Mark]

"result = pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &myirq);", ldd3, page.318.

[Mark]

"When the computer is booted, the firmware scans its PCI devices and sets the register (PCI_INTERRUPT_LINE register) for each device according to how the interrupt pin is routed for its PCI slot.", ldd3.page 318.

[scottxiao]

how is today's multi queue NIC implemented? AFAIK, each cpu has unique IRQ for the same NIC