What's the difference between $stop and $finish in Verilog?

Question

I'm using a GUI simulator, and they both seem to do the same thing.

Solution 1

According to the IEEE Standard for Verilog (1364-2005, Section 17.4, "Simulation control system tasks"), $stop should suspend the simulation, and $finish should make the simulator exit and pass control back to the host operating system. Of course, different simulators may implement the specification in subtly different ways, and not all simulators are 100% compliant with the spec.

The documentation for your simulator might provide a more detailed description of its behavior, especially with respect to GUI vs. command-line modes.

Solution 2

A quick reference link:

$finish;
    Finishes a simulation and exits the simulation process.
$stop;
    Halts a simulation and enters an interactive debug mode.

Solution 3

$stop : Undesired termination of the simulation. All the system activities are suspended. $finish : Used to relieve the compiler.

Good analogy would be $finish is like shutting down your computer and $stop is like abruptly pulling its plug.

Solution 4

$stop - Pauses the simulation, so you can resume it by using fg command in linux. In this case lincense will not be released and process also is not killed, consuming memory.

$finish - Simulation is finished, so releasing of license and killing the process will be done.

Solution 5

This link explains it to some extent.

$stop - When Verilog encounters a $stop, it pauses as if you sent a Ctrl-C.
$finish - Verilog exits as if you sent Ctrl-D when it encounters $finish.

Taken from Page 15 of this indtroduction PDF.

cheers

View more solutions

Comments

[Paddu]

Ctrl-D is considered as end of file, e.g. when a program is reading from standard input instead of a file on pressing Ctrl-D the program infers end of input. Standard Verilog doesn't have a routine like C's scanf to read standard input, so why would Ctrl-D have any effect on a Verilog simulation run?

[vineeshvs]

exit is another related command. It's useful to exit the simulation when you run Modelsim without gui. For example: vsim -c -keepstdout -do "do simulate_my_design.tcl"